174 lines
5.7 KiB
C
174 lines
5.7 KiB
C
/*
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* Copyright(c) 2006 to 2020 ZettaScale Technology and others
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*
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* This program and the accompanying materials are made available under the
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* terms of the Eclipse Public License v. 2.0 which is available at
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* http://www.eclipse.org/legal/epl-2.0, or the Eclipse Distribution License
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* v. 1.0 which is available at
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* http://www.eclipse.org/org/documents/edl-v10.php.
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*
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* SPDX-License-Identifier: EPL-2.0 OR BSD-3-Clause
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*/
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#ifndef DDSRT_ATOMICS_ARM_H
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#define DDSRT_ATOMICS_ARM_H
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#if defined (__cplusplus)
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extern "C" {
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#endif
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#if !defined(__arm__)
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#define __arm__
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#endif
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/* IAR documentation states that __CPU_MODE__ is a predefined preprocessor
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symbol reflecting the selected CPU mode and is defined to 1 for Thumb and
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2 for ARM. */
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#if !defined(__thumb__) && __CPU_MODE__ == 1
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#define __thumb__
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#endif
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/* LD, ST */
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inline uint32_t ddsrt_atomic_ld32 (const volatile ddsrt_atomic_uint32_t *x) { return x->v; }
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inline uintptr_t ddsrt_atomic_ldptr (const volatile ddsrt_atomic_uintptr_t *x) { return x->v; }
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inline void *ddsrt_atomic_ldvoidp (const volatile ddsrt_atomic_voidp_t *x) { return (void *) ddsrt_atomic_ldptr (x); }
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inline void ddsrt_atomic_st32 (volatile ddsrt_atomic_uint32_t *x, uint32_t v) { x->v = v; }
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inline void ddsrt_atomic_stptr (volatile ddsrt_atomic_uintptr_t *x, uintptr_t v) { x->v = v; }
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inline void ddsrt_atomic_stvoidp (volatile ddsrt_atomic_voidp_t *x, void *v) { ddsrt_atomic_stptr (x, (uintptr_t) v); }
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/* CAS */
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inline int ddsrt_atomic_cas32 (volatile ddsrt_atomic_uint32_t *x, uint32_t exp, uint32_t des) {
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register int result;
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asm volatile ("ldrex r0, [%1]\n\t" /*exclusive load of ptr */
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"cmp r0, %2\n\t" /*compare the oldval == *ptr */
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#if defined(__thumb__)
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"ite eq\n\t"
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#endif
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"strexeq %0, %3, [%1]\n\t" /*store if eq, strex+eq*/
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#if defined(__thumb__)
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"clrexne"
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#endif
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: "=&r" (result)
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: "r"(&x->v), "r"(exp),"r"(des)
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: "r0");
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return result == 0;
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}
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inline int ddsrt_atomic_casptr (volatile ddsrt_atomic_uintptr_t *x, uintptr_t exp, uintptr_t des) {
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return ddsrt_atomic_cas32 ((volatile ddsrt_atomic_uint32_t *) x, exp, des);
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}
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inline int ddsrt_atomic_casvoidp (volatile ddsrt_atomic_voidp_t *x, void *exp, void *des) {
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return ddsrt_atomic_casptr ((volatile ddsrt_atomic_uintptr_t *) x, (uintptr_t) exp, (uintptr_t) des);
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}
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/* ADD */
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inline uint32_t ddsrt_atomic_add32_nv (volatile ddsrt_atomic_uint32_t *x, uint32_t v) {
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register unsigned int result;
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asm volatile ("1: ldrex %0, [%1]\n\t"
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"add %0, %0, %2\n\t"
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"strex r1, %0, [%1]\n\t"
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"cmp r1, #0\n\t"
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"bne 1b"
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: "=&r" (result)
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: "r"(&x->v), "r"(v)
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: "r1");
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return result;
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}
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inline void ddsrt_atomic_add32 (volatile ddsrt_atomic_uint32_t *x, uint32_t v) {
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(void) ddsrt_atomic_add32_nv (x, v);
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}
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inline uint32_t ddsrt_atomic_add32_ov (volatile ddsrt_atomic_uint32_t *x, uint32_t v) {
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return ddsrt_atomic_add32_nv (x, v) - v;
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}
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/* SUB */
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inline uint32_t ddsrt_atomic_sub32_nv (volatile ddsrt_atomic_uint32_t *x, uint32_t v) {
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return ddsrt_atomic_add32_nv (x, -v);
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}
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inline void ddsrt_atomic_sub32 (volatile ddsrt_atomic_uint32_t *x, uint32_t v) {
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ddsrt_atomic_add32 (x, -v);
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}
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/* INC */
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inline uint32_t ddsrt_atomic_inc32_ov (volatile ddsrt_atomic_uint32_t *x) {
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return ddsrt_atomic_add32_nv (x, 1) - 1;
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}
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inline uint32_t ddsrt_atomic_inc32_nv (volatile ddsrt_atomic_uint32_t *x) {
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return ddsrt_atomic_add32_nv (x, 1);
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}
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inline void ddsrt_atomic_inc32 (volatile ddsrt_atomic_uint32_t *x) {
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(void) ddsrt_atomic_inc32_nv (x);
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}
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/* DEC */
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inline uint32_t ddsrt_atomic_dec32_ov (volatile ddsrt_atomic_uint32_t *x) {
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return ddsrt_atomic_sub32_nv (x, 1) + 1;
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}
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inline uint32_t ddsrt_atomic_dec32_nv (volatile ddsrt_atomic_uint32_t *x) {
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return ddsrt_atomic_sub32_nv (x, 1);
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}
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inline void ddsrt_atomic_dec32 (volatile ddsrt_atomic_uint32_t *x) {
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(void) ddsrt_atomic_dec32_nv (x);
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}
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/* AND */
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inline uint32_t ddsrt_atomic_and32_ov (volatile ddsrt_atomic_uint32_t *x, uint32_t v) {
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uint32_t oldval, newval;
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do { oldval = x->v; newval = oldval & v; } while (!ddsrt_atomic_cas32 (x, oldval, newval));
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return oldval;
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}
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inline uint32_t ddsrt_atomic_and32_nv (volatile ddsrt_atomic_uint32_t *x, uint32_t v) {
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uint32_t oldval, newval;
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do { oldval = x->v; newval = oldval & v; } while (!ddsrt_atomic_cas32 (x, oldval, newval));
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return newval;
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}
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inline void ddsrt_atomic_and32 (volatile ddsrt_atomic_uint32_t *x, uint32_t v) {
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(void) ddsrt_atomic_and32_nv (x, v);
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}
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/* OR */
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inline uint32_t ddsrt_atomic_or32_ov (volatile ddsrt_atomic_uint32_t *x, uint32_t v) {
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uint32_t oldval, newval;
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do { oldval = x->v; newval = oldval | v; } while (!ddsrt_atomic_cas32 (x, oldval, newval));
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return oldval;
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}
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inline uint32_t ddsrt_atomic_or32_nv (volatile ddsrt_atomic_uint32_t *x, uint32_t v) {
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uint32_t oldval, newval;
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do { oldval = x->v; newval = oldval | v; } while (!ddsrt_atomic_cas32 (x, oldval, newval));
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return newval;
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}
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inline void ddsrt_atomic_or32 (volatile ddsrt_atomic_uint32_t *x, uint32_t v) {
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(void) ddsrt_atomic_or32_nv (x, v);
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}
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/* FENCES */
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inline void ddsrt_atomic_fence (void) {
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__asm volatile ("dmb" : : : "memory");
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}
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inline void ddsrt_atomic_fence_ldld (void) {
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ddsrt_atomic_fence ();
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}
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inline void ddsrt_atomic_fence_stst (void) {
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ddsrt_atomic_fence ();
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}
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inline void ddsrt_atomic_fence_acq (void) {
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ddsrt_atomic_fence ();
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}
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inline void ddsrt_atomic_fence_rel (void) {
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ddsrt_atomic_fence ();
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}
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#if defined (__cplusplus)
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}
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#endif
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#endif /* DDSRT_ATOMICS_ARM_H */
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